The advent of the Internet of Things (IoT) era has fueled the emergence of new applications that improve various aspects of everyday human life. An ever-increasing number and type of IoT sensors (herein referred to as edge devices) are being deployed to seamlessly bridge the physical world with the world of computing infrastructure. However, powering such deeply-embedded IoT edge devices is extremely challenging due to their unique constraints such as remote deployment location, tiny form factor, and extreme longevity requirements. Environmental energy harvesting (where the system powers itself using energy that it scavenges from its operating environment) has been shown to be a promising and viable option for powering these IoT devices. However, ambient energy sources (such as vibration, wind, RF signals) are often unreliable and intermittent in nature, which can lead to frequent intervals of power loss. Performing computations reliably in the face of such power supply interruptions is challenging and requires some form of checkpointing of system state from static random access memory (SRAM) to non-volatile memory when power loss is imminent. Traditionally, microcontrollers have employed flash memory as the primary non-volatile storage technology. However, the energy (and latency) intensive erase/write operations of flash memory make it inefficient for frequent checkpointing.
The emergence of non-volatile memory technologies such as ferroelectric RAM (FRAM) and magnetoresistive RAM (MRAM), which have superior power and performance characteristics compared to flash memory, has led to new hybrid memory architectures. Low power microcontrollers (MCUs) that integrate FRAM and MRAM have been demonstrated in the field. Recent work has also shown that the use of FRAM as unified memory (where all program segments including text, stack, data, etc., are mapped to the FRAM) enables efficient in-situ checkpointing in IoT devices, thereby allowing them to seamlessly perform long-running computations in the face of frequent power loss. Even though FRAM outperforms flash in terms of performance and power consumption, it is still inferior to SRAM due to inherent device limitations. For example, in Texas Instrument's model MSP430FR5739 microcontroller, accesses to FRAM are 3× slower and consume more energy as compared to SRAM. Therefore, executing programs from FRAM results in lower performance and higher energy consumption, compared to executing programs from SRAM. On the other hand, an entirely SRAM-based solution is highly energy efficient when running continuously on reliable power, but is unreliable in the face of power loss because SRAM is volatile. Therefore, improvements are needed in the field.